The IC 24LC01/24LC02 uses the I2C addressing proto- col and 2-wire serial interface which includes a bidirec- tional serial data bus synchronized by a clock. Microchip 24LC02 EEPROM are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Microchip 24LC02 EEPROM. Description, Bit/Bit Serial EePROM Write Protect Memory Chips. Company, Pronics. Datasheet, Download 24LC02 datasheet. Quote. Find where to.

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This happens during the ninth clock cycle. Internally organized with 8-bit words, the 1K requires a 7-bit data word address for random word addressing.

Output Valid from Clock. Commerical temperature range 0. Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle.

Hardware controlled write protection. These are stress ratings only. If the device is still busy with the.

24LC02 Datasheet(PDF) – Ceramate Technical

Search field Part name Part description. Data Input Hold Time. The higher data word datashewt bits are not incremented, re- taining the memory page row location refer datsaheet Page write timing. Partial page write allowed. During data transfer, the data line must remain stable whenever the clock line is high. Stresses exceeding the range specified under “Absolute Maxi. Internally organized with 8-bit words, the 2K requires an 8-bit data word address for random word addressing.


Clock and data transition. A write operation requires an 8-bit data word address following the device address word and acknowledgment. The pin is open-drain driven and 24lc022 be wired-OR with any number of other open-drain or open collector devices.

Output Capacitance See Note. Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete this feature can be used to maximize bus throughput. After receiving the 8-bit data word, the EEPROM will output a zero and the address- ing device, such as a microcontroller, must terminate the write sequence with a stop datasheeh dition.

These three bits must compare to their corresponding hard-wired input pins. Instead, after the EEPROM ac- knowledges the receipt of the first data word, the microcontroller can transmit up to seven more data words. Time in which the bus must be free before a new transmission can start. ACK polling datashest be initiated immediately.

The datasheft is optimized for use in many industrial and com. For relative timing, refer to timing diagrams. Characteristics Functional Description Timing Diagrams. A page write is initiated the same as byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Upon receipt of this ad- dress, the EEPROM will again respond with a zero and then clock in the first 8-bit data word.


Write operation with built-in timer. A read operation is initi- ated if this bit is high and a write operation is initiated if this bit is low. Data Input Setup Time. After this period the first clock pulse is generated. The microcontroller must terminate the page write sequence with a stop condition.

Document Outline

If not, the chip will return to a standby state. The device address word consist of a mandatory one, 244lc02 sequence for the first four most significant bits refer to the diagram show- ing the Device Address. Serial clock data input. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. The SDA pin is bidirectional for serial data transfer.

Data transfer may be initiated only when the. Input Capacitance See Note.